Ultra-Low Latency C++ Lead Engineer – FPGA & Trading

Company: J.P. MORGAN
Apply for the Ultra-Low Latency C++ Lead Engineer – FPGA & Trading
Location: London
Job Description:

Join J.P. MORGAN as an Ultra Low Latency C++ Lead Software Engineer, where you will design, build, and operate cutting-edge market gateway solutions. Collaborate with talented engineers to enhance trading connectivity and risk management applications while optimizing for latency and stability.

In this role, your expertise in modern C++, knowledge of hardware acceleration, and experience with Agile methodologies will be crucial as you contribute to high-speed trading across global markets.

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Posted: June 21st, 2026