Principal Engineer Verification

Company: Dormont Manufacturing Co
Apply for the Principal Engineer Verification
Location: Cambridge
Job Description:

Job Description

Microchip’s MCU Business Unit is a premier supplier of Microcontrollers that empower our customers’ designs in diverse applications, ranging from general-purpose embedded control to secured Internet of Things (IoT) solutions and beyond. Our broad and scalable portfolio of devices includes powerful, state-of-the-art features and options to create innovative products. Our silicon supports a rich ecosystem of embedded software development.

The MCU Product Development team is engaged through the full SOC R&D cycle, including microarchitecture, design, verification, emulation and implementation. We are an experienced, global SOC development team working with state-of-the-art semiconductor development tools and methodologies in advanced process technologies.

Key Responsibilities

  • Work with post si validation, architecture, applications, and design teams to understand module and system requirements and develop comprehensive verification plans.
  • Define and develop testbench architecture, test environment and an effective suite of tests using a mix of System Verilog, C++ and PERL to achieve functional verification goals.
  • Develop effective functional assertions and cover elements; verify structural and functional coverage of module and system level test suite.
  • Develop scripts to automate verification process.
  • Provide guidance and support to the verification development activities of team members.
  • Provide feedback and review of verification activities across MCU division.
  • Define and develop verification process improvements and methodologies as part of continuous improvement.
  • Support debug of Post Si issues with validation, applications, design, product and test.

Requirements / Qualifications

  • 12.5+ years of industry experience.
  • Relevant degree qualified.
  • Good understanding of Microcontroller architecture and products.
  • Expertise in Verilog, System Verilog, C++, PERL/TCL and associated Mentor, Visualizer/Verdi tools and workflows.
  • Expertise in digital design fundamentals and ability to debug complex designs at RTL and gate level; expertise in module level verification and system level verification.
  • Expertise in writing reusable System Verilog verification code and testbench architecture.
  • Very good understanding of object-oriented programming concepts.
  • Working experience in UVM verification methodology.
  • Able to write tests in C to verify SoC functionality.
  • Able to define verification process documentation, flows and review verification methodologies.
  • Strong analytical and problem-solving skills, as well as hands‑on SoC debugging/bring‑up skills.
  • Able to set team goals and work consistently towards achieving them.
  • Excellent verbal, written and presentation skills.

Travel Time

0% – 25%

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Posted: July 1st, 2026