Contract FPGA Design & Verification Engineer

Jobtailor in Reading, United Kingdom, seeks an experienced FPGA engineer to design, verify and optimize high-performance FPGA solutions. You will implement SystemVerilog logic, develop RTL, and create DSP pipelines for ADCs, DACs and memory interfaces within RF SoC platforms.

Collaboration with cross-functional teams and external partners is essential. The role emphasizes deterministic timing, timing closure and multi-clock domain design, with hands-on lab debugging and documentation to ensure

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