Senior CPU Verification Engineer – Verilog, C++, VLSI

AMD in Cambridge is seeking a Staff Verification Design Engineer responsible for planning, building, and executing the verification of features for AMD’s microprocessor IP, ensuring a bug-free final design.

The role requires collaboration with architects and engineers, strong analytical and problem-solving skills, and proficiency in C++, System Verilog, and IP level ASIC verification. Excellent communication and teamwork are essential.

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