Photonic Layout Engineer

Photonic Layout Engineer

We are looking for a Photonic Layout Engineer to join our QPU Design team at Oxford Ionics/IonQ.

Key Responsibilities

• Arrange and route photonic components on chip in coordination with metal track and CMOS routing.
• Produce reticle‑size photonic layout files using Python scripts for tape‑out of the full chip, suitable for use in a commercial foundry.
• Collaborate with scientists to discuss their requirements.
• Interface with photonic designers, test engineers, packaging engineers, and fabrication engineers to define design rules and shape component design.
• Verify layout through DRC and LVS.
• Contribute to custom layout Process Design Kits (PDKs) specific to IonQ and the foundry.
• Document the layout process and the final tape‑out mask files.

Qualifications

• Significant experience in the design and layout of Photonic Integrated Circuits (PICs).
• Proficiency in PIC layouts and familiarity with the principles of photonic devices such as waveguides, beamsplitters, grating couplers, and similar.
• Minimum 2 years of experience with Python software packages for photonic mask layout (e.g., Luceda IPKISS, GDSFactory, Klayout).
• Degree in Photonics, Physics, Electrical Engineering or a related field, or equivalent industry experience.
• Strong collaboration and communication skills, and the ability to work independently and prioritize tasks in a time‑sensitive environment.
• Background in commercial simulation, verification and layout environments such as Synopsys, Cadence or Ansys is desirable.
• Strong programming and software skills.

Benefits

We offer a competitive salary with IonQ stock options, an annual performance bonus, generous annual leave, flexible hybrid working, private medical and dental insurance for you and your family, and opportunities to further your career alongside industry leaders.

We are a proud equal‑opportunity employer and welcome applicants from all backgrounds.

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