End-to-End ASIC PD Engineer – Low Latency

Jane Street is seeking an ASIC Physical Design Engineer to join their Ultra Low Latency team in Greater London. This role involves designing, testing, and deploying advanced hardware while collaborating with diverse teams such as trading and networking. Candidates should have experience across the chip design process and be comfortable owning a physical design flow end-to-end. Applicants are encouraged if they have a background in RTL design and a passion for improving hardware engineering through software techniques.#J-18808-Ljbffr…