SoC ASIC/FPGA Design Engineer – RTL, C/C++, Python

Company: Edison Smart®
Apply for the SoC ASIC/FPGA Design Engineer – RTL, C/C++, Python
Location: Cambridge
Job Description:

A technology company in Cambridge is seeking an ASIC Hardware Engineer to join their advanced semiconductor team. The ideal candidate will have a strong background in ASIC and/or FPGA design, along with programming experience in C/C++ and Python. Candidates should be knowledgeable about GPU, CPU, DSP, or FPU architectures. This role promises an exciting opportunity for career advancement within a leading organization focused on cutting-edge technologies.#J-18808-Ljbffr…

Posted: January 20th, 2026