Senior FPGA Engineer for Ultra-Low Latency Systems

A leading technology firm is seeking a Senior FPGA Engineer to join their team in Cambridge. In this role, you will oversee FPGA system design to enhance ultra-low latency technology. Responsibilities include architecting RTL designs, performing simulations, and mentoring team members. Ideal candidates will have 7+ years in FPGA design, a strong background in SystemVerilog, and experience with tools like Vivado. This position offers competitive compensation for skilled engineers passionate about technology advancements. #J-18808-Ljbffr