Senior PIC Design Engineer

Company: Seer
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Job Description:

Overview

Join a pioneering team focused on advancing the frontiers of photonics and optical system integration. Our client is an innovative, growth-stage company developing next-generation optical platforms for high-impact applications.

Responsibilities

  • Lead the end-to-end design, simulation, and layout of active and passive photonic integrated circuits.
  • Perform rigorous electromagnetic and optical simulations using industry-standard tools (FDTD, EME, Mode solvers).
  • Create, optimize, and verify complex GDSII layouts for tape-out, ensuring strict adherence to foundry Design Rule Checks (DRC).
  • Collaborate directly with external semiconductor foundries to manage multi-project wafer (MPW) runs and integrate process design kits (PDKs).
  • Partner with test and packaging engineering teams to define testing protocols, analyze wafer- and die-level data, and correlate empirical measurements with simulation models.
  • Develop custom automation scripts for layout generation, simulation sweeps, and high-volume data analysis to streamline the design cycle.

Requirements

  • Master’s degree or Ph.D. in Electrical Engineering, Photonics, Physics, Optical Engineering, or a closely related discipline.
  • Proven industry experience in the design, tape-out, and testing of Photonic Integrated Circuits (e.g., Silicon Photonics, InP, or Silicon Nitride).
  • Proficiency with commercial optical and multiphysics simulation software (such as Lumerical, Photon Design, RSoft, or COMSOL).
  • Strong hands-on experience with layout and DRC verification tools (such as KLayout, Luceda IPKISS, Synopsys OptoDesigner, or Cadence).
  • Fluency in programming languages like Python, MATLAB, or C++ for lab automation, data analysis, and layout scripting.
  • Deep understanding of waveguide theory, semiconductor physics, and high-speed optical communication principles.
  • Excellent problem-solving skills with the ability to thrive in a fast-paced, cross-functional startup environment.

Posted: April 3rd, 2026