Ultra-Low Latency C++ Lead Engineer (FPGA Trading)

Company: JPMorgan Chase & Co.
Apply for the Ultra-Low Latency C++ Lead Engineer (FPGA Trading)
Location: Greater London
Job Description:

A leading global financial institution is seeking an Ultra Low Latency C++ Lead Software Engineer to drive the design and development of innovative trading technologies. The role focuses on creating high-performance market gateway solutions with hardware acceleration. Candidates should have strong expertise in C++ and multithreading along with experience in operational stability and agile practices. Collaboration with hardware engineering teams is crucial. This position offers significant career growth opportunities within a dynamic team environment.#J-18808-Ljbffr…

Posted: April 12th, 2026