Senior RTL Design Engineer - RISC-V CPU Midcore

Company: SiFive

Location: Cambridge

Posted: April 17th, 2026

A leading computing firm in Cambridge is seeking a CPU Microarchitecture/RTL design engineer to join their innovative team. The role includes architecting and implementing features in RISC-V CPU cores, and collaborating on verification processes. Candidates should have a BS/MS in relevant fields with 5+ years of design experience, strong RTL design skills, and an affinity for high-quality work. Join us to push the boundaries of CPU technology and work in a diverse, inclusive environment. #J-18808-Ljbffr
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