Senior CPU RTL Design Engineer - RISC-V Core

Company: SiFive

Location: Cambridge

Posted: April 17th, 2026

A technology company specializing in microprocessor design is seeking a CPU Microarchitecture/RTL design engineer to join their team in Cambridge, UK. The role involves designing and implementing features in RISC-V CPU core generators, collaborating with cross-functional teams, and ensuring high-quality output. Ideal candidates will have a strong background in RTL design, proficiency in Verilog/SystemVerilog, and excellent teamwork skills. This position offers a dynamic working environment emphasizing innovation and quality. #J-18808-Ljbffr
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