Purpose of role
The primary aim of this role is to lead front‑end design activities within customer projects. A lead technical planner and contributor on ASIC and IP development projects, working very closely with programmed management and senior design leads to implement and track digital IP designs and integrate these and 3rd party designs into customer ASICs and SoCs.
The role involves working directly with customers, IP vendors and architects to define innovative tailored solutions that can be translated into high quality, achievable designs.
The candidate will own and technically lead aspects of a design or ASIC/SoC integration and will lead and monitor the interactions between multi‑site engineering teams to ensure efficient communication, resolve design and methodology issues and make effective decisions to ensure projects remain on track with respect to schedules, budgets, and quality commitments.
Responsibilities
- Leading a successful team.
- Gather creative and talented technical staff and form a team for achievement of targets.
- Provide technical and practical support to engineering team members as required and provide training and documentation on methodologies and best practice.
- Keep up to date with relevant engineering advances in the field and ensure that Aion Silicon (GM1) is kept at the forefront of the state‑of‑the‑art technologies, methodologies and design processes as used in the industry.
- Work with broader engineering teams and engineering management to define new or improved methodologies and ways of working. Effectively delegate tasks relating to technical design and flow development.
- Work with programme management team to identify risks and opportunities, estimate engineering effort, and update on progress against project plans.
- Definition of design intent/microarchitecture and new design methodology and clear documentation thereof.
- Trialling and deployment of industry‑leading EDA tools for design quality assurance, power optimisation, constraints generation and synthesis/timing analysis.
- Track development activities and administer milestones deliverables.
- Collate engineering data and provide regular feedback to customers and programme management about plans, risks, issues, progress, etc.
- Ownership of design blocks and technical leadership of all frontend aspects of their development from specification through handover with physical design team. Ongoing technical support through to productization.
- Represent Aion Silicon at universities, conferences and meetings and present technical papers.
Qualifications
- A degree/masters or PhD in either a relevant or non‑relevant subject.
- Typically, 10+ years’ experience.
- Very strong knowledge of digital design concepts and application in complex SoCs.
- Experience with High‑Performance Compute (HPC) architectures, including: CPU design and optimisation.
- Serves as a subject matter expert within a technical discipline with latitude for decision making.
- Serves as an independent individual contributor to technical project and lead the technical direction of team members.
- Solve technical problems of advanced complexity and convey/apply solutions.
- Evaluates issues and defines solutions.
- Applies judgment in interpreting results and conducting quantitative analysis.
- May manage others on the team.
- Provides technical training.
- Contributes to technical white papers.
- Contributes to sales support as part of a team effort, such as a Statement of Work.
- Listens to customer feedback, recognizes opportunities and provides feedback for technical innovation.
- Use of Issue and Task tracking tools (e.g. Jira).
Attributes
- Excellent leadership, communication and negotiation skills and time management skills.
- Self‑organisation and ability to respond to changing priorities quickly.
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