Staff Verification Engineer - System IP

Job Description

This position provides an outstanding opportunity for a highly motivated and experienced verification engineer to join the engaging, hardworking, and creative System IP team.

The latest and most advanced hardware design and verification methodologies are employed to build the System IPs that will drive the development of the next generation of compute solutions for every area of technology, from mobile phones, to servers, to autonomous vehicles.

About The Team

The Arm Central Engineering – System IP group in Cambridge is responsible for specifying, developing and validating IP products from the Arm CoreLink and CoreSight IP portfolio, responsible for interrupt control, inter-process communication, trace, and debug solutions. These IPs are a crucial part of systems that scale from real-time embedded to hyperscale cloud. We are looking for verification experts to join our team and play an integral role in developing technology that makes people's lives better.

This role will be based at Arm’s corporate headquarters in the historic city of Cambridge, home to one of the world’s most renowned and oldest Universities.

What will you be accountable for?

Role

For this role we are looking for engineers who are capable of owning the verification of a unit within a project through all phases of the design and verification flow. This includes:

• Working closely with the RTL design team to develop comprehensive verification strategies
• Creating and reviewing design verification documentation
• Designing and implementing SystemVerilog/UVM based verification IP and testbenches
• Improving existing testbenches to increase performance, quality and efficiency
• Testing and debugging Verilog RTL
• Defining and implementing functional coverage as well as enhancing the testbench to ensure coverage closure
• Planning and tracking tasks to meet the targets at the planned time
• Driving the execution to ensure the quality of the design work done, along with on-time delivery
• Coaching and mentoring junior engineers

Required Skills and Experience

• Substantial experience in RTL verification of complex ASIC products
• Proficiency in a hardware verification language, preferably System Verilog / UVM
• Experience in the development of coverage-driven constrained random test environments
• Experience producing specifications and documentation describing complex designs
• Understanding of the fundamentals of computer architecture
• Strong communication skills and ability to work well as part of a team

Nice to have Skills and Experience

• Scripting languages such as Python or Perl
• Exposure to all stages of the design cycle: initial concept, specification, implementation and testing, documentation and support
• Understanding of object-oriented programming, data structures, and algorithms
• Knowledge of formal verification techniques and tools
• Hardware design language, preferably Verilog

Salary Range

£97,300 - £131,700 per year

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

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