Senior Design Verification Engineer

I am working with a fast-growing semiconductor company in Cambridge that is expanding its Digital Verification team and hiring across Mid, Senior, and Lead levels.

This is a fantastic opportunity to join a team working at the forefront of open-source silicon development, with a strong focus on production-ready RISC-V-based technologies such as Ibex CPU and OpenTitan, in collaboration with world-class partners including Google.

You’ll be part of a highly technical environment where you can not only deliver high-quality verification work, but also influence methodology, standards, and long-term verification strategy, especially at senior and lead level.

Why this role is exciting

• Permanent role based in Cambridge (hybrid options considered)
• Work on cutting-edge open-source silicon
• Collaborate with global industry-leading partners
• Real opportunity to shape verification strategy and grow with the team

What you will be doing

• SystemVerilog / UVM-based verification (block & SoC level)
• Verification of CPU, GPU, and complex SoC subsystems
• Debugging regressions and reviewing open-source contributions
• Driving coverage closure, constrained-random verification, and CI flows
• Mentoring engineers (Senior/Lead level)
• Supporting successful tapeouts and full verification lifecycles

What they are looking for

• Experience in digital design verification (Mid to Lead level depending on seniority)
• Strong SystemVerilog / UVM expertise
• Experience in CPU and/or GPU verification
• Strong C / Python scripting and Git/GitHub workflow experience
• Exposure to full tapeout lifecycle (Senior/Lead level preferred)

If this sounds like something you would like to explore, I would be happy to share more details or arrange an informal chat.

Please feel free to send your CV to: tee@microtech-global.com

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