London, Hybrid Working (2 Days Per Week On Site Near Fenchurch Street Station)
Excellent opportunity for a Layout Engineer to join an innovative semiconductor company working on next-generation memory technology, offering the chance to build your career in a highly specialist and growing sector.
This company are a forward-thinking engineering business developing advanced low-power semiconductor solutions. With a strong technical team and exciting future plans, they offer a collaborative environment where engineers can gain hands‑on experience on genuinely cutting‑edge projects.
In this role you will support layout and physical design activities across a range of semiconductor products. You will work closely with experienced engineers across analogue, digital and device teams, using industry‑leading EDA tools to develop and optimise designs.
The ideal candidate will have 1 to 2 years of industry experience within layout engineering, physical design, PCB layout or IC layout. Experience with EDA tools is essential, with exposure to semiconductor environments highly beneficial.
This is a fantastic opportunity for a junior engineer looking to progress quickly, gain exposure to advanced semiconductor design, and join a business where your development will be actively supported.
The Role:
- Layout and physical design for semiconductor products
- Use EDA tools to create, modify and optimise designs
- Work with analogue and digital teams on new product development
- Support design reviews, testing and documentation
- Hybrid working with 2 days per week in the London office
The Person:
- 1 to 2 years’ experience in layout / physical design / PCB / IC design
- Experience with EDA tools
- Familiarity with Synopsys, Cadence Design Systems or Siemens EDA advantageous
- Interest in semiconductor memory technology beneficial
- Keen to develop within a specialist engineering environment
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