Summary
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you will help design and manufacture our next‑generation, high‑performance, power‑efficient Graphics processors (GPUs). You will ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you will be crafting and building the technology that fuels Apple’s devices and enabling our customers to do all the things they love.
Description
This role requires a mix of strategic engineering along with hands‑on, technical work. You will be responsible for implementing complete chip designs from RTL to tape‑out. Join us!
Responsibilities
- Work closely with the Front‑End team to understand chip architecture and drive physical aspects early in the design cycle.
- Drive best‑in‑class Physical Design construction and optimization recipes for performance, power and Area (PPA).
- Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution and track progress.
- Serve as focal point for place and route; drive the work among place and route engineers, set goals and breakthroughs, plan short and long‑term work, and understand dependencies between different domains such as top, STA, block Place & Route.
- Manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
Minimum Qualifications
- BSc/MSEE/M Eng/BEng or equivalent is required.
- Proven ability in all aspects of ASIC implementation including synthesis, DFT insertion, floorplanning, clock and power distribution, place & route and all aspects of timing, electrical and physical sign‑off.
Preferred Qualifications
- Work with Front‑End teams to understand the design architecture to drive optimal floorplanning and physical implementation through early RTL feedback.
- Use design knowledge and state‑of‑the‑art physical construction and optimization flow to push performance, power, and Area (PPA) of GPU designs.
- Experience with multi‑voltage, power gated and power retention will be an advantage.
- Practical knowledge with hierarchical design approach, top‑down design, budgeting, timing and physical convergence will be an asset.
- Showcase experience integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.
- Depth of expertise with large GPU designs (>20M gates) with frequencies in excess of 1GHz utilizing state‑of‑the‑art technologies will serve you well.
- Detailed understanding of database management issues.
- Experience with CAD tools for crafting floor‑planning tools, P&R flows, global timing verification and Physical Design Verification flows is required.
- Familiarity with various process‑related design issues including design for yield and manufacturability, multi‑VT strategies and thermal management.
Equal Opportunity & Inclusion Statement
At Apple, we are not all the same and that is our greatest strength. We draw on the differences in who we are, what we’ve experienced, and how we think. Because to create products that serve everyone, we believe you to be a person that belongs. We are committed to treating all applicants fairly and equally, provide reasonable accommodations, and consider all qualified applicants with criminal backgrounds in a manner consistent with applicable law.
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