Our client, a specialist technology organisation developing high-performance optical network monitoring systems, is expanding its firmware engineering capability. The role of Firmware Engineer sits within an R&D environment delivering FPGA-based platforms for security-sensitive communications infrastructure.
Responsibilities
- Architecture, implementation and verification of FPGA subsystems for optical networking products
- Development of synthesizable HDL for custom IP cores and full FPGA SoC designs
- Creation and execution of simulation and verification environments
- Integration of high-speed interfaces including optical links and SERDES
- Support of timing closure across multi-clock, high-frequency designs
- Contribution to design reviews, documentation and technical decision-making
- Senior engineers may provide technical leadership and mentoring
Technical Requirements
- Degree in Electronic Engineering, Computer Engineering or similar
- Strong experience in FPGA development at subsystem or full-device level
- Proficient in VHDL and/or Verilog
- Experience with Xilinx and/or Intel FPGA and CPLD families
- End-to-end FPGA development experience (specification, RTL, synthesis, place & route, timing analysis)
- Design of high-speed, multi-domain clocking architectures
- Experience with high-speed optical interfaces
- SERDES design and integration experience (up to ~28Gbps)
- Use of revision control systems such as Git, Subversion or equivalent
Other
- Able to work to demanding schedules in a collaborative engineering environment
- Eligibility for UK Government security clearance is required
Our client, a specialist technology organisation developing high-performance optical network monitoring systems, is expanding its firmware engineering capability. The role of Firmware Engineer sits within an R&D environment delivering FPGA-based platforms for security-sensitive communications infrastructure.
Responsibilities
- Architecture, implementation and verification of FPGA subsystems for optical networking products
- Development of synthesizable HDL for custom IP cores and full FPGA SoC designs
- Creation and execution of simulation and verification environments
- Integration of high-speed interfaces including optical links and SERDES
- Support of timing closure across multi-clock, high-frequency designs
- Contribution to design reviews, documentation and technical decision-making
- Senior engineers may provide technical leadership and mentoring
Technical Requirements
- Degree in Electronic Engineering, Computer Engineering or similar
- Strong experience in FPGA development at subsystem or full-device level
- Proficient in VHDL and/or Verilog
- Experience with Xilinx and/or Intel FPGA and CPLD families
- End-to-end FPGA development experience (specification, RTL, synthesis, place & route, timing analysis)
- Design of high-speed, multi-domain clocking architectures
- Experience with high-speed optical interfaces
- SERDES design and integration experience (up to ~28Gbps)
- Use of revision control systems such as Git, Subversion or equivalent
Other
- Able to work to demanding schedules in a collaborative engineering environment
- Eligibility for UK Government security clearance is required
…
