Huawei Research and Development UK Limited Overview
Huawei’s vision is a fully connected, intelligent world. To achieve this, we work to inspire passion for basic research around the world. Our combined passion drives development across the global innovation value chain. Huawei has the largest Research and Development organization in the world with 96,000+ employees in research centers around the globe. In the UK, we already have design centers in Cambridge, London, Edinburgh and Ipswich. We continue to explore and define new research directions and new services. We have expanded our collaborations with academic researchers; researched new network architectures, integration of communications and key enabling technologies; and developed the fundamental theories of these technologies. We invite you to join us on this exciting journey and drive your career forward.
Job Summary
Huawei’s UK Research Center is seeking a Performance Modeling Engineer to join our growing CPU Architecture team. You will be at the forefront of pioneering next-generation CPU innovations and guiding Huawei’s architectural roadmap. Using advanced modeling, simulation, and workload characterization techniques, you will evaluate potential hardware design choices, quantify their trade‑offs, and provide data‑driven insights that shape upcoming CPU features.
Key Responsibilities
You will design, implement, and refine performance models that accurately predict CPU microarchitecture behavior, maintaining in‑house toolchains for cycle‑accurate, trace‑driven, or statistical simulations. Leveraging these models, you will assess the feasibility and cost‑benefit trade‑offs of new CPU features by conducting in‑depth performance and power analyses. This includes developing new methodologies, automating workflows, and creating intuitive visualizations to reveal bottlenecks and guide optimizations. Working closely with architects, software engineers, and a global community of performance modeling experts, you will collaborate on design reviews, share best practices, and continuously improve our modeling strategies to inform next‑generation CPU innovations.
Person Specification
Required
Bachelor’s (BS) or Master’s (MS) degree in Computer Science, Electrical Engineering, or related fields, with coursework or relevant experience in Computer Architecture.
- Prior hands‑on experience in performance modeling and analysis of CPU microarchitecture.
- Familiarity with cycle‑accurate, cycle‑approximate or functional simulators, microarchitecture pipelines, and common performance metrics.
- Strong proficiency in C/C++ for large‑scale software development, with working knowledge of Python for scripting and data analysis.
- Excellent interpersonal skills, with a track record of working collaboratively in multi‑disciplinary teams.
- Able to communicate technical concepts clearly to both technical and non‑technical audiences.
Desired
- Experience with power models and cache system models.
- Strong software development experience, including design specification, coding, testing, and debugging.
- Experience with, or understanding of, Arm architectures (e.g., Armv8‑A, Armv9‑A).
- Exposure to microarchitecture‑level performance counters, or hardware‑software co‑optimization.
- Experience with RTL and SystemC simulators.
- Knowledge of System Architecture/Software.
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