GPU Validation and Emulation Engineer – Qualcomm – Cambridge, UK

Responsibilities

• Synthesize Verilog RTL and create models; compile them to emulators like Veloce, Palladium, Zebu, or FPGA platforms.
• Develop all aspects of hardware emulator implementation, focusing on design partitioning, synthesis, place and route, timing analysis, and runtime performance.
• Drive debug of failure on emulator using latest technologies; collaborate with designers and software driver team for test planning and debugging.
• Work with tool vendors and improve methodology to increase area/performance of the synthesized FPGA RTL.
• Integrate third‑party IP and perform system‑level debugging.
• Conduct system level RTL simulation and design verification.
• Support chip bring‑up and post‑silicon debug.
• Debug functional and timing models.

Preferred Qualifications

• Bachelor’s degree in Science, Engineering, or closely related field.
• 3+ years of hands‑on experience in emulation/simulation acceleration/FPGA.
• 2+ years of experience creating high‑performance and area‑efficient emulation environments from RTL.
• 2+ years of experience in emulator platforms, platform bring‑up, digital design, verification, debugging, and waveform viewing.
• Experience with hardware emulators such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs.
• Experience with emulation methodologies including in‑circuit emulation, hybrid systems, or simulation acceleration.

Desirable Skills

• MS degree in Electrical Engineering or equivalent, with 2 years of practical experience.
• Design verification knowledge – UVM/SystemVerilog preferred.
• Knowledge of GPU/CPU/DDR/Bus architectures.
• Experience with Verilog and SystemVerilog.
• System‑level software debugging and RTL debugging.
• Programming skills in C and C++.
• Experience scripting in Python, Tcl, or Perl.
• Knowledge of vendor emulation tools, Xilinx tools, and synthesis tools.

Minimum Qualifications

• Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm is an equal opportunity employer.

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