Oversee system design and take a leading role.
Location & Compensation
Cambridge, hybrid work; salary up to £80,000 (DOE).
Overview
This US tech firm’s Cambridge R&D office uses dynamic, high‑speed FPGA RTL logic to execute automated trades in nanoseconds. The role is part of a senior engineering team that values efficient, low‑lead‑time delivery.
Responsibilities
- Lead and oversee all aspects of FPGA system design.
- Pursue superior technical approaches to the problem.
- Collaborate with software engineers working in Rust and C++.
- See your work put to productive use without a long lead time.
Qualifications
Applicants should have significant commercial‑grade experience and a strong relevant CV demonstrating skills with Vivado / Quartus and SystemVerilog, Verilog or VHDL.
Benefits
Hybrid working: work from home two days per week or come to the office with flexible hours. Flexible scheduling and a relaxed office environment with access to parking.
Apply
Only if you are eligible to live and work in the UK. By submitting your details you certify that the information you provide is accurate. Refer to CV27657 when applying.
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