Senior Verification Architect, SystemVerilog & UVM

IC Resources is seeking a Senior Staff Verification Engineer based in Bristol, United Kingdom. You will develop SystemVerilog UVM testbench environments, ensuring verification environments meet all sign-off criteria. This role includes representing the verification perspective in design reviews and contributing to testbench architecture.

We are looking for candidates with a minimum of 7 years’ experience in hardware verification, specifically with UVM and SystemVerilog. Join a global R&D organization and advance your career in verification strategies.

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