Palma Ceia SemiDesign is seeking senior digital design engineers to join their innovative team in Cambridge, UK. The ideal candidates will have solid experience in specifying, implementing, and verifying digital sub-systems within SoCs, with a particular focus on wireless communications.
The role involves architectural design, RTL design, and conducting peer reviews within a collaborative environment. Applicants should hold a relevant Bachelor’s or Master’s degree and possess proficiency in Verilog/VHDL and various scripting languages, alongside strong communication skills.
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