Overview
Our client is a leading technology-driven quantitative trading firm seeking an experienced C++ engineer to join a team building next-generation ultra-low-latency trading infrastructure. This is an opportunity to work on performance-critical systems where every nanosecond matters.
You will design and optimise low-latency C++ systems used across trading, market data, and core infrastructure. Working alongside FPGA, hardware, and infrastructure engineers, you will help build highly optimised solutions that maximise performance from hardware through to software.
This opportunity is well suited to engineers from HFT, electronic trading, exchange technology, networking, embedded systems, telecommunications, gaming, or any other environment where performance and efficiency are critical.
Key Responsibilities
- Design and develop ultra-low-latency C++ systems
- Optimise performance across CPU, cache, memory, and networking
- Profile, benchmark, and tune latency-critical applications
- Collaborate with hardware, FPGA, and infrastructure engineering teams
- Contribute to the design of high-performance trading architecture
Requirements
- 5+ years of experience developing performance-critical C++ applications (C++20 or newer preferred)
- Strong systems programming knowledge and understanding of CPU architecture, memory management, and Linux internals
- Experience with low-level profiling, benchmarking, and performance optimisation
- Solid understanding of networking and operating system fundamentals
- Exposure to FPGA integration or hardware acceleration is advantageous but not essential
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