Senior FPGA/ASIC Verification Engineer, 100Gbps Networking

Oriole Networks is seeking an experienced Verification Engineer to design and implement verification strategies for high‑speed network interfaces between xPUs and proprietary hardware. You will build module and system level testbenches, develop coverage models and drive coverage closure with a focus on reliability and production readiness.

The role involves collaborating with RTL and system teams, debugging complex issues, and contributing to verification infrastructure architecture.

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