Principal Silicon Design Verification Engineer

Principal Design Verification Engineer

AMD is looking for a talented individual to join the Network Technology Solutions Group in the Data Center Solutions Group as Principal Design Verification Engineer in our Edinburgh office. This team develops RTL blocks and subsystems for the AMD Pensando AI NIC product line, allowing GPU clusters to be built to support AI training and inference workloads at scale.

Key Responsibilities

As a Principal Design Verification Engineer, you will lead the verification efforts to functionally verify complex RTL blocks destined for the next generation of Data Center networking ASICs.

About You

• Experience of working as a technical lead in a verification team
• Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems.
• Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework.
• Experience of verification coverage closure in an ASIC or FPGA project.
• Strong problem-solving skills.
• Experience of Synopsys functional verification tools would be an advantage.
• Experience of full chip verification would be an advantage.
• Experience of formal verification would be an advantage.
• Knowledge of AI-based debug techniques would be an advantage.
• Knowledge of Python would be an advantage.
• Experience in C/C++ would be an advantage.
• RTL design experience would be an advantage.
• Experience in networking technologies and products would be an advantage.

Academic Credentials

Minimum of a Degree/Masters in Electronic Engineering, Computer Science or a related subject.

Competitive Compensation

• Annual Bonus
• Stock Awards (in the form of RSUs)
• Retirement and Savings Programs
• Employee Stock Purchase Program
• Life Insurance and Survivor Income Benefits

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